Design of Arithmetic Logic Unit using Reversible Logic Gates

Abstract

 Reversible logic has gained significant attention in recent years due to its potential to reduce energy dissipation in computing systems. It is particularly useful in applications such as low-power VLSI design, quantum computing, DNA computing, cryptography, digital image processing, and optical information processing. This project presents the design of a reversible logic-based Arithmetic Logic Unit (ALU), which offers a power-efficient alternative to conventional ALUs built using irreversible logic gates. The proposed reversible ALU consists of two main components: a control block and an adder block, both designed using basic reversible logic gates. Reversible gates, unlike traditional ones, maintain a one-to-one mapping between input and output vectors, allowing backward computation and minimizing energy loss. Key gates used in this design include the Universal Reversible Gate (URG), Feynman, Fredkin, and HNG gates. A 1-bit ALU is first constructed using these reversible gates, and then four 1-bit units are integrated to create a 4-bit ALU. The resulting circuit is capable of performing various arithmetic and logic operations such as AND, OR, NOR, NAND, XOR, XNOR, addition, and subtraction. This approach demonstrates the effectiveness of reversible logic in building energy-efficient computing architectures.